1. Field of the Invention
The present invention is related to an analog interface circuit. Furthermore, the present invention is directed to a technique effectively applied to such an analog interface circuit which has been manufactured in a semiconductor integrated circuit, for instance, a technique which is effectively utilized in a communication appliance known as a modulator, a speech codec, and the like.
2. Description of the Related Art
For instance, as shown in FIG. 3, at page 6 of Japanese Laid-open Patent Application No. Hei-9-238078, while a conventional level shift circuit is equipped with a differential operational amplifier and a single-phase operational amplifier, both a positive-phase output and a negative-phase output of a current adding type digital-to-analog converter are connected to two input terminals of the differential operational amplifier, respectively. Also, since a potential difference between the two input terminals of the differential operational amplifier is amplified by the single-phase operational amplifier and then the amplified potential difference is fed back to the current adding type digital-to-analog converter, output currents of the positive-phase output and the negative-phase output of the current adding type digital-to-analog converter are adjusted in a fine mode, offset voltages of a first output terminal and a second output terminal of the differential operational amplifier are adjusted in a fine mode, and thus, an offset error is decreased.
However, in the circuit arrangement described in the conventional technique, such a means for detecting and correcting the offset error which is owned by the differential operational amplifier itself is not provided, the offset error is increased. The present invention has been made to solve the above-described problem, and therefore, has an object to provide a level shift circuit capable of correcting an offset error of an entire system, which also contains an offset error owned by an operational amplifier itself.